2017 ASEE Annual Conference & Exposition

verilogTown - Improving Students Learning Hardware Description Language Design - Verilog - with a Video Game

Presented at COED: EE Topics

In this work, we present our game verilogTown as an aid to students learning Verilog. The reason for such a game comes from our experiences teaching digital system design where we observed a challenge for second year students learning to design with the Verilog hardware description language (HDL). In this work, we speculate why it is hard to learn an HDL, claiming that like learning all design languages, the students do not play/use the language enough to develop an understanding of them (including Verilog). A student's typical process of learning Verilog includes class examples and assignments, labs, and a project, but like learning more traditional programming languages, until a learner spends significant time using a language to build something, these experiences only result in a basic understanding. verilogTown was created to provide students with a medium to play with Verilog in an engaging and safe environment. The hope is that instead of simply completing a working design for a class, students will be challenged by the game puzzles and will spend significantly more time with Verilog design. Our comparison on exam performance in 2014 and 2015 without and with verilogTown suggests that our game improves student's understanding of Verilog.

Authors
  1. Dr. Peter Jamieson Miami University [biography]
Note

The full paper will be available to logged in and registered conference attendees once the conference starts on June 24, 2017, and to all visitors after the conference ends on June 28, 2018

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